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x86 Programming Notes, Part 1

Labels and data

In NASM, a colon after a label can be optional in an appropriate declaration:

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infi jmp near infi

Place embedded data where execution cannot fall into it, for example after a control transfer that prevents fallthrough. A CS: override can access data in a code segment, although a dedicated data-segment convention is often clearer. NASM uses a trailing backslash as a line continuation.

Clearing a register

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xor  dx,dx

mov dx,0 encodes as BA 00 00, while xor dx,dx encodes as 31 D2 in the discussed 16-bit forms. The latter is shorter. Its speed depends on the processor, and it changes flags, so the two sequences are not interchangeable when flags must be preserved.

Repeated string movement

A plain movsw transfers one word. rep movsw, encoded here as F3 A5, repeats according to CX and stops when the count reaches zero. Source and destination index movement also depends on the direction flag.

Flags and branch displacement

Zero detection can be understood as a NOR reduction of result bits, although a real flag circuit depends on the implementation. LOOP decrements its count and conditionally branches; it is a distinct instruction rather than necessarily being implemented by another architectural JMP.

For a relative branch, the encoded displacement is the target address minus the address immediately following the instruction. In assembly, a label supplies the target; the assembler calculates the displacement. The original 8086 has short conditional branches, while later x86 versions add wider forms.

8086 address registers

Ordinary 16-bit effective-address forms use BX, BP, SI, and DI in defined combinations. SP, IP, AX, CX, and DX are not freely interchangeable in those forms. This is an encoding rule, shaped by the historical roles of the registers.

AX is the accumulator and has some compact special encodings; CX is a count register; DX participates in I/O and wide arithmetic; SI and DI are source and destination indices. The following comparison illustrates an encoding-length difference:

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add ax,1
inc ax

In the source’s example, the latter form has shorter machine code.

Signed arithmetic

NEG forms the two’s-complement arithmetic negative of its operand; NOT complements bits. CBW sign-extends AL into AX, and CWD sign-extends AX into DX:AX.

A signed integer’s top bit participates in the value representation, as well as indicating sign. Many operations use the same bit-level calculation for signed and unsigned values, but interpretation of flags differs. Multiplication and division also provide distinct signed forms: MUL/IMUL and DIV/IDIV.

For example, decimal -3904 is F0C0h in 16 bits and FFFFF0C0h in 32 bits:

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mov ax,0xf0c0
cwd
mov bx,0x10
idiv bx

Text attributes and little-endian storage

Putting attribute 04h in AH and an ASCII character in AL creates a word suitable for a text-mode character cell. Stored little-endian, the character occupies the lower address and the attribute follows. The attribute in the studied mode means red on black without the extra intensity or blink bits.

More flag observations

JNS branches when SF is clear. Instructions such as DEC update SF from the result’s most significant bit. The parity flag describes the parity of the low result byte; its existence is separate from modern storage and communication error-detection schemes such as CRC or ECC.

CF records carry or borrow for relevant arithmetic, but INC and DEC deliberately preserve it. AND clears CF and OF, derives SF/ZF/PF from the result, and leaves AF undefined. Ordinary PUSH and POP do not change flags; flag-specific stack instructions are separate cases.

OR can coincide with addition when the operands have no overlapping set bits, but it is not a general replacement for addition.

The current-location symbol

NASM’s $ refers to the current assembly position. jmp near $ loops at the same instruction, much like an explicitly named self-branch, without inventing a label.

Stack access and addressing forms

Stack operations use SS:SP, and BP-based addressing normally defaults to SS. BP provides a way to inspect stack-resident arguments or saved data without moving the top of the stack. A separate stack region can help avoid accidental overlap, but reserving an entire 64 KiB is not a universal safety requirement; correct bounds and depth matter.

The notes distinguish immediate, register, direct memory, base (BX/BP), index (SI/DI), and allowed base-plus-index addressing. ADC extends arithmetic across multiple words by incorporating the carry from a lower part.

Booting and relocation

In the legacy BIOS workflow studied here, firmware loads a boot sector at physical 0x7C00 and transfers control to it. That sector is a bridge to a larger loader or operating system. Installing an OS typically writes its files and establishes the required boot chain, rather than using the boot sector only for demonstration arithmetic or text output.

Programs stored on disk must be loaded into memory. A segmented loader may need to recalculate segment values according to the chosen load position; this is relocation. NASM segment declarations, alignment settings, and vstart affect how assembly-time addresses are calculated and should be considered alongside the loader’s contract.

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